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FSQ110 -- Green Mode Fairchild Power Switch (FPSTM)
November 2007
FSQ110 Green Mode Fairchild Power Switch (FPSTM)
Features
Internal Avalanche-Rugged 650V SenseFET Consumes only 0.65W at 230 VAC & 0.3W Load with Burst-Mode Operation Precision Fixed Operating Frequency: 100kHz Internal Start-up Circuit and Built-in Soft-Start Pulse-by-Pulse Current Limiting and Auto-Restart Mode Over-Voltage Protection (OVP), Overload Protection (OLP), Internal Thermal Shutdown Function (TSD) Under-Voltage Lockout (UVLO) Low Operating Current: 3mA Adjustable Peak Current Limit
Description
The FSQ110 consists of an integrated, current-mode, Pulse Width Modulator (PWM) and an avalanche-rugged 650V SenseFET. It is specifically designed for highperformance off-line Switch-Mode Power Supplies (SMPS) with minimal external components. The integrated PWM controller features include: a fixedfrequency generating oscillator, Under-Voltage Lockout (UVLO) protection, Leading-Edge Blanking (LEB), an optimized gate turn-on/ turn-off driver, Thermal Shutdown (TSD) protection, and temperaturecompensated precision current sources for loop compensation and fault protection circuitry. Compared to a discrete MOSFET and controller or RCC switching converter solution, the FSQ110 reduces total component count, design size, and weight while increasing efficiency, productivity, and system reliability. These devices provide a basic platform that is well suited for the design of cost-effective flyback converters.
Applications
SMPS for STB, Low-cost DVD
Related Application Notes
AN-4134: Design Guidelines for Off-line Forward Converters Using Fairchild Power Switch (FPSTM) AN-4137: Design Guidelines for Off-line Flyback Converters Using Fairchild Power Switch (FPSTM) AN-4141: Troubleshooting and Design Tips for Fairchild Power Switch (FPSTM) Flyback Applications AN-4147: Design Guidelines for RCD Snubber of Flyback 8-DIP
Ordering Information
Product Number
FSQ110
Package
8DIP
Marking Code
Q110
BVDSS
650V
fOSC
100kHz
RDS(ON) (MAX.)
19
All package are lead free per JEDEC: J-STD-020B standard.
FPSTM is a trademark of Fairchild Semiconductor Corporation.
(c) 2007 Fairchild Semiconductor Corporation FSQ110 Rev. 1.0.0 www.fairchildsemi.com
FSQ110 -- Green Mode Fairchild Power Switch (FPSTM)
Application Diagram
AC IN DC OUT
Vstr IPK PWM FB
Drain
VCC
GND
FSQ0x70RNA Rev. 1.01
Figure 1. Typical Flyback Application
Output Power Table(1)
Product
FSQ110
230VAC 15%(2) Adapter
11W
(3)
85-265VAC
(4)
Open Frame
17W
Adapter
8W
(3)
Open Frame(4)
12W
Notes: 1. The maximum output power can be limited by junction temperature. 2. 230 VAC or 100/115 VAC with doubler. 3. Typical continuous power in a non-ventilated enclosed adapter with sufficient drain pattern as a heat sink, at 50C ambient. 4. Maximum practical continuous power in an open-frame design with sufficient drain pattern as a heat sink, at 50C ambient.
Internal Block Diagram
VCC 2
ICH
Vstr 5
Drain 6,7,8
8V/12V VBURL/VBURH VCC IDELAY VCC OSC IFB Normal 2.5R Burst R PWM
VCC good
Vref
Internal Bias
FB 3 IPK 4
S R
Q Q LEB
Gate Driver
VSD VCC S Vovp VCC good TSD R Q Soft-Start FSQ110 Rev. 1.00 Q
1
GND
Figure 2. Internal Block Diagram
(c) 2007 Fairchild Semiconductor Corporation FSQ110 Rev. 1.0.0
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FSQ110 -- Green Mode Fairchild Power Switch (FPSTM)
Pin Configuration
GND VCC 8-DIP FB IPK
FSQ110
D D D Vstr
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin #
1
Name
GND
Description
Ground. SenseFET source terminal on primary side and internal control ground. Power Supply. Positive supply voltage input. Although connected to an auxiliary transformer winding, current is supplied from pin 5 (Vstr) via an internal switch during start-up (see Figure 2). It is not until VCC reaches the UVLO upper threshold (12V) that the internal start-up switch opens and device power is supplied via the auxiliary transformer winding. Feedback. The feedback voltage pin is the non-inverting input to the PWM comparator. It has a 0.9mA current source connected internally, while a capacitor and opto-coupler are typically connected externally. A feedback voltage of 6V triggers overload protection (OLP). A time delay while charging external capacitor CFB from 3V to 6V using an internal 5A current source delay prevents false triggering under transient conditions, but still allows the protection mechanism to operate under true overload conditions. Peak Current Limit. This pin adjusts the peak current limit of the SenseFET. The 0.9mA feedback current source is diverted to the parallel combination of an internal 2.8k resistor and any external resistor to GND on this pin. This determines the peak current limit. If this pin is tied to VCC or left floating, the typical peak current limit is 0.7A. Start-up. This pin connects to the rectified AC line voltage source. At start-up, the internal switch supplies internal bias and charges an external storage capacitor placed between the VCC pin and ground. Once the VCC reaches 12V, the internal switch is opened. SenseFET Drain. High-voltage power SenseFET drain connection. SenseFET Drain. High-voltage power SenseFET drain connection. SenseFET Drain. High-voltage power SenseFET drain connection.
2
VCC
3
FB
4
IPK
5 6 7 8
Vstr D D D
(c) 2007 Fairchild Semiconductor Corporation FSQ110 Rev. 1.0.0
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FSQ110 -- Green Mode Fairchild Power Switch (FPSTM)
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA = 25C, unless otherwise specified.
Symbol
VDRAIN VSTR IDM EAS VCC VFB PD TJ TA TSTG Drain Pin Voltage Vstr Pin Voltage Drain Current
Characteristic
Value
650 650 1.5
Unit
V V A mJ V V W C C C
Pulsed(5) Energy(6)
Single Pulsed Avalanche Supply Voltage Feedback Voltage Range Total Power Dissipation
10 20 -0.3 to VCC 1.40 Internally limited -25 to +85 -55 to +150
Operating Junction Temperature Operating Ambient Temperature Storage Temperature
Notes: 5. Repetitive rating: Pulse width is limited by maximum junction temperature. 6. L = 24mH, starting TJ = 25C.
Thermal Impedance
TA = 25C, unless otherwise specified. All items are tested with the standards JESD 51-2 and 51-10 (DIP).
Symbol
JA JC
Parameter
Junction-to-Ambient Thermal Junction-to-Case Thermal Resistance(7) Resistance(8)
Value
88.84 13.94
Unit
C/W C/W
Notes: 7. Free standing with no heatsink; without copper clad. (Measurement Condition - Just before junction temperature TJ enters into OTP.) 8. Measured on the DRAIN pin close to plastic interface.
(c) 2007 Fairchild Semiconductor Corporation FSQ110 Rev. 1.0.0
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FSQ110 -- Green Mode Fairchild Power Switch (FPSTM)
Electrical Characteristics
TA = 25C unless otherwise specified.
Symbol
SenseFET Section(10)
Parameter
Condition
VDS = Max. Rating VGS = 0V VDS = 0.8 Max. Rating VGS = 0V, TC = 125C VGS = 10V, ID = 0.5A VGS = 0V, VDS = 25V, f = 1MHz
Min.
Typ.
Max.
Unit
25 A 200 14 162 18 3.8 9.5 19 33 42 92 100 5 55 11 7 0.7 60 12 8 0.9 10 0.5 0.6 0.4 200 0.70 600 125 5.5 18 140 6.0 19 5.0 6.5 20 6.5 0.7 0.5 300 0.80 108 10 65 13 9 1.1 KHz % % V mA ms V V mV A ns C V V A ns 3 0.85 5 1.00 mA mA pF 19
IDSS
Zero-Gate-Voltage Drain Current
RDS(ON) CISS COSS CRSS td(on) tr td(off) tf fOSC fOSC DMAX VSTART VSTOP IFB tS/S VBURH VBURL VBUR(HYS)
Drain-Source On-State Resistance(11) Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Switching Frequency Switching Frequency Maximum Duty Cycle UVLO Threshold Voltage Feedback Source Current Internal Soft-Start Time(10) Variation(10)
VDS = 325V, ID = 1A
ns
Control Section -25C TA 85C Measured at 0.1 x VDS VFB = GND VFB = GND VFB = GND VFB = 4V
Burst-Mode Section Burst-Mode Voltage TJ = 25C 0.3 100 Peak Current Limit Current Limit Delay Thermal Shutdown Time(10) Temperature(10) di/dt = 170mA/s 0.60
Protection Section ILIM tCLD TSD VSD VOVP IDELAY tLEB IOP ICH
Shutdown Feedback Voltage Over-Voltage Protection Shutdown Delay Current Leading-Edge Blanking Time
(10)
VFB = 4V
3.5 200
Total Device Section Operating Supply Current (control part only) Start-Up Charging Current VCC = 14V VCC = 0V 1 0.70
Vstr Supply Voltage VCC = 0V 24 V VSTR Notes: 10. These parameters, although guaranteed, are not 100% tested in production. 11. Pulse test: Pulse width 300s, duty 2%. 12. The ESD level of an existing product can be applied to FSQ110 because it has same ESD protection circuit.
(c) 2007 Fairchild Semiconductor Corporation FSQ110 Rev. 1.0.0
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FSQ110 -- Green Mode Fairchild Power Switch (FPSTM)
Typical Performance Characteristics (Control Part)
These characteristic graphs are normalized at TA= 25C.
1.2 1.0
1.2 1.0
Normalized
0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 150
Normalized
0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 150
Temperature [C]
Temperature [C]
Figure 4. Operating Frequency (fOSC) vs. TA
Figure 5. Over-Voltage Protection (VOVP) vs. TA
1.2 1.0
1.2 1.0
Normalized
0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 150
Normalized
0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 150
Temperature [C]
Temperature [C]
Figure 6. Maximum Duty Cycle (DMAX) vs. TA
Figure 7. Operating Supply Current (IOP) vs. TA
1.2 1.0
1.2 1.0
Normalized
Normalized
0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 150
0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 150
Temperature [C]
Temperature [C]
Figure 8. Start Threshold Voltage (VSTART) vs. TA
(c) 2007 Fairchild Semiconductor Corporation FSQ110 Rev. 1.0.0
Figure 9. Stop Threshold Voltage (VSTOP) vs. TA
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FSQ110 -- Green Mode Fairchild Power Switch (FPSTM)
Typical Performance Characteristics (Continued)
These characteristic graphs are normalized at TA= 25C.
1.2 1.0
1.2 1.0
Normalized
0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 150
Normalized
0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 150
Temperature [C]
Temperature [C]
Figure 10. Feedback Source Current (IFB) vs. TA
Figure 11. Start-Up Charging Current (ICH) vs. TA
1.2 1.0
Normalized
0.8 0.6 0.4 0.2 0.0 -25 0 25 50 75 100 125 150
Temperature [C]
Figure 12. Peak Current Limit (ILIM) vs. TA
(c) 2007 Fairchild Semiconductor Corporation FSQ110 Rev. 1.0.0
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FSQ110 -- Green Mode Fairchild Power Switch (FPSTM)
Functional Description
1. Startup: In previous generations of Fairchild Power Switches (FPSTM), the Vstr pin required an external resistor to the DC input voltage line. In this generation, the startup resistor is replaced by an internal highvoltage current source and a switch that shuts off 10ms after the supply voltage, VCC, goes above 12V. The source turns back on if VCC drops below 8V.
VIN,dc ISTR
Vstr Vcc Vcc<8V UVLO on 10ms after Vcc 12V UVLO off ICH
J-FET
4. Protection Circuits: The FPS has several protective functions, such as Overload Protection (OLP), OverVoltage Protection (OVP), Under-Voltage Lockout (UVLO), and Thermal Shutdown (TSD). Because these protection circuits are fully integrated in the IC without external components, reliability is improved without increasing cost. Once a fault condition occurs, switching is terminated and the SenseFET remains off. This causes VCC to fall. When VCC reaches the UVLO stop voltage, VSTOP (typically 8V), the protection is reset and the internal high-voltage current source charges the VCC capacitor via the Vstr pin. When VCC reaches the UVLO start voltage, VSTART (typically 12V), the FPS resumes normal operation. In this manner, the auto-restart can alternately enable and disable the switching of the power SenseFET until the fault condition is eliminated. 4.1 Overload Protection (OLP): Overload is defined as the load current exceeding a pre-set level due to an unexpected event. In this situation, the protection circuit should be activated to protect the SMPS. However, even when the SMPS is operating normally, the OLP circuit can be activated during the load transition. To avoid this undesired operation, the OLP circuit is designed to be activated after a specified time to determine whether it is a transient situation or a true overload situation. In conjunction with the IPK current limit pin (if used), the current mode feedback path limits the current in the SenseFET when the maximum PWM duty cycle is attained. If the output consumes more than this maximum power, the output voltage (VO) decreases below nominal voltage. This reduces the current through the opto-coupler LED, which also reduces the optocoupler transistor current, increasing the feedback voltage (VFB). If VFB exceeds 3V, the feedback input diode is blocked and the 5A current source (IDELAY) starts to slowly charge CFB up to VCC. In this condition, VFB increases until it reaches 6V, when the switching operation is terminated, as shown in Figure 15. The shutdown delay time is the time required to charge CFB from 3V to 6V with 5A current source.
VFB
FSQ110 Rev.00
FSQ100 Rev. 1.00
Figure 13. High-Voltage Current Source 2. Feedback Control: The FSQ110 employs currentmode control as shown in Figure 14. An opto-coupler (such as the H11A817A) and shunt regulator (such as the KA431) are typically used to implement the feedback network. Comparing the feedback voltage with the voltage across the Rsense resistor of SenseFET, plus an offset voltage, makes it possible to control the switching duty cycle. When the shunt regulator reference pin voltage exceeds the internal reference voltage of 2.5V, the opto-coupler LED current increases, the feedback voltage VFB is pulled down and thereby reduces the duty cycle. This typically happens when the input voltage increases or the output load decreases.
V CC 5A VO V CC 900A OSC + V FB 431 D1 D2 2.5R V FB,in R Gate driver
FB
3 C FB
OLP FSQ110Rev. 1.00 V SD
Overload Protection
Figure 14. Pulse Width Modulation Circuit 3. Leading-Edge Blanking (LEB): When the internal SenseFET is turned on, the primary-side capacitance and secondary-side rectifier diode reverse recovery typically cause a high-current spike through the SenseFET. Excessive voltage across the Rsense resistor leads to incorrect feedback operation in the currentmode PWM control. To counter this effect, the FPS employs a Leading-Edge Blanking (LEB) circuit. This circuit inhibits the PWM comparator for a short time (tLEB) after the SenseFET is turned on.
6V
3V
t12= CFBx(V(t2)-V(t1)) / IDELAY
t1
t12 = CFB V ( t 2 ) - V ( t1 ) ; I DELAY
t2
IDELAY = 5 A, V ( t1 ) = 3V , V ( t 2 ) = 6V
t
Figure 15. Overload Protection (OLP)
(c) 2007 Fairchild Semiconductor Corporation FSQ110 Rev. 1.0.0
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FSQ110 -- Green Mode Fairchild Power Switch (FPSTM)
4.2 Thermal Shutdown (TSD): The SenseFET and the control IC are integrated, making it easier for the control IC to detect the temperature of the SenseFET. When the temperature exceeds approximately 140C, thermal shutdown is activated. 4.3 Over-Voltage Protection (OVP): In the event of a malfunction in the secondary-side feedback circuit or an open-feedback loop caused by a soldering defect, the current through the opto-coupler transistor becomes almost zero (see Figure 14). VFB climbs up in a similar manner to the overload situation, forcing the preset maximum current to be supplied to the SMPS until the overload protection is activated. Because excess energy is provided to the output, the output voltage may exceed the rated voltage before the overload protection is activated, resulting in the breakdown of the devices in the secondary side. To prevent this situation, an OverVoltage Protection (OVP) circuit is employed. In general, VCC is proportional to the output voltage and the FPS uses VCC instead of directly monitoring the output voltage. If VCC exceeds 19V, the OVP circuit is activated, resulting in termination of the switching operation. To avoid undesired activation of OVP during normal operation, VCC should be designed to be below 19V. 5. Soft-Start: The FPS has an internal soft-start circuit that slowly increases the SenseFET current after startup, as shown in Figure 16. The typical soft-start time is 10ms, where progressive increments of the SenseFET current are allowed during the start-up phase. The pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. The voltage on the output capacitors is progressively increased to smoothly establish the required output voltage. This also helps prevent transformer saturation and reduces the stress on the secondary diode during startup.
5V #6,7,8 DRAIN
burst-mode when the feedback voltage drops below VBURH (typically 600mV). Switching continues until the feedback voltage drops below VBURL (typically 400mV). At this point, switching stops and the output voltage starts to drop at a rate dependent on the standby current load. This causes the feedback voltage to rise. Once it passes VBURH, switching resumes. The feedback voltage then falls and the process is repeated. Burstmode operation alternately enables and disables switching of the SenseFET and reduces switching loss in standby mode.
Burst Operation VFB Burst Operation Normal Operation
VBURH VBURL Current Waveform Switching OFF Switching OFF FSQ110 Rev.00
Figure 17. Burst Operation Function
7. Adjusting Peak Current Limit: As shown in Figure 18, a combined 2.8k internal resistance is connected to the non-inverting lead on the PWM comparator. An external resistance of Rx on the current limit pin forms a parallel resistance with the 2.8k when the internal diodes are biased by the main current source of 900A.
V CC 5A V FB 3 IDELAY IFB
V CC 900A 2k PWM Comparator
0.8k IPK 4 Rx FSQ0110 Rev. 1.00 SenseFET Current Sense
#1 GND ILIM Rsense
Figure 18. Peak Current Limit Adjustment
FSQ110 Rev. 1.00
Figure 16. Soft-Start Function
For example, FSQ110 has a typical SenseFET peak current limit (ILIM) of 0.7A. ILIM can be adjusted to 0.6A by inserting Rx between the IPK pin and the ground. The value of the Rx is estimated by the following equation: 0.7A: 0.6A = 2.8k : Xk, X = Rx || 2.8k where X is the resistance of the parallel network. (1)
6. Burst Operation: To minimize power dissipation in standby mode, the FPS enters burst-mode operation. Feedback voltage decreases as the load decreases, as shown in Figure 17, and the device automatically enters
(c) 2007 Fairchild Semiconductor Corporation FSQ110 Rev. 1.0.0
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FSQ110 -- Green Mode Fairchild Power Switch (FPSTM)
Application Information
Methods of Reducing Audible Noise
Switching-mode power converters have electronic and magnetic components, which generate audible noise when the operating frequency is in the range of 20~20,000Hz. Even though they operate above 20KHz, they can make noise, depending on the load condition. The following sections discuss methods to reduce noise.
Glue or Varnish The most common method of reducing noise involves using glue or varnish to tighten magnetic components. The motion of core, bobbin, and coil and the chattering or magnetostriction of core can cause the transformer to produce audible noise. The use of rigid glue and varnish helps reduce the transformer noise. Glue or varnish can also can crack the core because sudden changes in the ambient temperature cause the core and the glue to expand or shrink in a different ratio.
Figure 19. Equal Loudness Curves
Ceramic Capacitor Using a film capacitor instead of a ceramic capacitor as a snubber capacitor is another noise-reduction solution. Some dielectric materials show a piezoelectric effect, depending on the electric field intensity. A snubber capacitor becomes one of the most significant sources of audible noise. Another possibility is to use a Zener clamp circuit instead of an RCD snubber for higher efficiency as well as lower audible noise.
Adjusting Sound Frequency Moving the fundamental frequency of noise out of the 2~4kHz range is a third method. Generally, humans are more sensitive to noise in the range of 2~4kHz. When the fundamental frequency of noise is located in this range, the noise sounds louder although the noise intensity level is identical (see Figure 19). When the FPS acts in burst mode and the burst operation is suspected to be a source of noise, this method may be helpful. If the frequency of burst mode operation lies in the range of 2~4kHz, adjusting the feedback loop can shift the burst operation frequency. To reduce the burst operation frequency, increase a feedback gain capacitor (CF), opto-coupler supply resistor (RD), and feedback capacitor (CB); and decrease a feedback gain resistor (RF), as shown in Figure 20.
Figure 20. Typical Feedback Network of FPS
Reference Materials
AN-4134: Design Guidelines for Off-line Forward Converters Using Fairchild Power Switch (FPSTM) AN-4137: Design Guidelines for Off-line Flyback Converters Using Fairchild Power Switch (FPSTM) AN-4140: Transformer Design Consideration for Off-line Flyback Converters using Fairchild Power Switch (FPSTM) AN-4141: Troubleshooting and Design Tips for Fairchild Power Switch (FPSTM) Flyback Applications AN-4147: Design Guidelines for RCD Snubber of Flyback AN-4148: Audible Noise Reduction Techniques for FPS Applications
(c) 2007 Fairchild Semiconductor Corporation FSQ110 Rev. 1.0.0
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FSQ110 -- Green Mode Fairchild Power Switch (FPSTM)
Package Dimensions
9.83 9.00
6.67 6.096
8.255 7.61
5.08 MAX
3.683 3.20
7.62
0.33 MIN (0.56) 2.54
3.60 3.00 0.56 0.355 1.65 1.27
7.62
0.356 0.20 9.957 7.87
NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-001 VARIATION BA B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. D) DIMENSIONS AND TOLERANCES PER ASME Y14.5M-1994 E) DRAWING FILENAME AND REVSION: MKT-N08FREV2.
Figure 21. 8-Lead Dual In-Line Package (DIP)
(c) 2007 Fairchild Semiconductor Corporation FSQ110 Rev. 1.0.0
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FSQ110 -- Green Mode Fairchild Power Switch (FPSTM)
(c) 2007 Fairchild Semiconductor Corporation FSQ110 Rev. 1.0.0
www.fairchildsemi.com 12

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